{ "cells": [ { "cell_type": "markdown", "metadata": {}, "source": [ "# Capacitance Simulation of X-mon Coupled to Transmission line via Resonator" ] }, { "cell_type": "markdown", "metadata": {}, "source": [ "### Qiskit Metal Design" ] }, { "cell_type": "code", "execution_count": null, "metadata": {}, "outputs": [], "source": [ "%load_ext autoreload\n", "%autoreload 2\n", "import os\n", "os.environ[\"KMP_DUPLICATE_LIB_OK\"]=\"TRUE\"\n", "os.environ[\"PMIX_MCA_gds\"]=\"hash\"\n", "\n", "# Import useful packages\n", "import qiskit_metal as metal\n", "from qiskit_metal import designs, draw\n", "from qiskit_metal import MetalGUI, Dict, open_docs\n", "from qiskit_metal.toolbox_metal import math_and_overrides\n", "from qiskit_metal.qlibrary.core import QComponent\n", "from collections import OrderedDict\n", "from qiskit_metal.qlibrary.qubits.transmon_cross import TransmonCross\n", "from qiskit_metal.qlibrary.tlines.meandered import RouteMeander\n", "from qiskit_metal.qlibrary.tlines.straight_path import RouteStraight\n", "from qiskit_metal.qlibrary.tlines.pathfinder import RoutePathfinder\n", "from qiskit_metal.qlibrary.terminations.launchpad_wb import LaunchpadWirebond\n", "from qiskit_metal.qlibrary.terminations.open_to_ground import OpenToGround\n", "from qiskit_metal.qlibrary.terminations.short_to_ground import ShortToGround\n", "from qiskit_metal.qlibrary.couplers.coupled_line_tee import CoupledLineTee\n", "\n", "# Set up chip design as planar\n", "design = designs.DesignPlanar({}, overwrite_enabled=True)\n", "\n", "# Set up chip dimensions \n", "design.chips.main.size.size_x = '4.6mm'\n", "design.chips.main.size.size_y = '2.4mm'\n", "design.chips.main.size.size_z = '-280um'\n", "design.chips.main.size.center_x = '0mm'\n", "design.chips.main.size.center_y = '-1mm'\n", "\n", "# Resonator and feedline gap width (W) and center conductor width (S) \n", "design.variables['cpw_width'] = '10 um' #S\n", "design.variables['cpw_gap'] = '6 um' #W \n", "\n", "# Create GUI\n", "gui = MetalGUI(design)\n", "\n", "# Lauchpad 1\n", "x1 = '-2mm'\n", "y1 = '0mm'\n", "launch_options1 = dict(chip='main', pos_x=x1, pos_y=y1, orientation='360', lead_length='30um', pad_height='103um', \n", " pad_width='103um', pad_gap='60um')\n", "LP1 = LaunchpadWirebond(design, 'LP1', options = launch_options1)\n", "\n", "# Launchpad 2\n", "x2 = '2mm'\n", "y1 = '0mm'\n", "launch_options2 = dict(chip='main', pos_x=x2, pos_y=y1, orientation='180', lead_length='30um', pad_height='103um', \n", " pad_width='103um', pad_gap='60um')\n", "LP2 = LaunchpadWirebond(design, 'LP2', options = launch_options2)\n", "\n", "# Using path finder to connect the two launchpads\n", "TL = RoutePathfinder(design, 'TL', options = dict(chip='main', trace_width ='10um',\n", " trace_gap ='6um',\n", " fillet='90um', \n", " hfss_wire_bonds = True,\n", " lead=dict(end_straight='0.1mm'),\n", " pin_inputs=Dict(\n", " start_pin=Dict(\n", " component='LP1',\n", " pin='tie'),\n", " end_pin=Dict(\n", " component='LP2',\n", " pin='tie')\n", " )))\n", "\n", "######################\n", "#Transmon Cross Qubit#\n", "######################\n", "\n", "Q1 = TransmonCross(design, 'Q1', options = dict(pos_x = '0.6075mm', pos_y='-1.464',\n", " connection_pads = dict(\n", " bus_01 = dict(connector_location = '180',claw_length ='95um'),\n", " readout = dict(connector_location = '0')),\n", " fl_options = dict()))\n", "\n", "######################\n", "# Resonator #\n", "######################\n", "\n", "#open to ground for resonator\n", "otg1 = OpenToGround(design, 'otg1', options=dict(chip='main', pos_x='-0.2mm', pos_y='-40um', orientation = 180))\n", "\n", "# Use RouteMeander to fix the total length of the resonator\n", "res1 = RouteMeander(design, 'resonator1', Dict(\n", " trace_width ='10um',\n", " trace_gap ='6um',\n", " total_length='3.7mm',\n", " hfss_wire_bonds = False,\n", " fillet='99.9 um',\n", " lead = dict(start_straight='300um'),\n", " pin_inputs=Dict(\n", " start_pin=Dict(component= 'otg1', pin= 'open'),\n", " end_pin=Dict(component= 'Q1', pin= 'readout')), ))\n", "\n", "# rebuild the GUI\n", "gui.rebuild()\n", "design.rebuild()" ] }, { "cell_type": "markdown", "metadata": {}, "source": [ "### Capacitance Simulation" ] }, { "cell_type": "markdown", "metadata": {}, "source": [ "##### Now to run the Palace simulation (*make sure to update the path to the Palace binary first*)" ] }, { "cell_type": "code", "execution_count": 7, "metadata": {}, "outputs": [], "source": [ "from SQDMetal.PALACE.Capacitance_Simulation import PALACE_Capacitance_Simulation\n", "\n", "#Eigenmode Simulation Options\n", "user_defined_options = {\n", " \"mesh_refinement\": 0, #refines mesh in PALACE - essetially divides every mesh element in half\n", " \"dielectric_material\": \"silicon\", #choose dielectric material - 'silicon' or 'sapphire'\n", " \"solver_order\": 2, #increasing solver order increases accuracy of simulation, but significantly increases sim time\n", " \"solns_to_save\": 3, #number of solutions to save for E-field visualization - ordered by the entries in the computed capacitance matrix\n", " \"solver_tol\": 1.0e-8, #error residual tolerance for iterative solver\n", " \"solver_maxits\": 200, #number of solver iterations\n", " \"fillet_resolution\":12, #number of vertices per quarter turn on a filleted path\n", " \"palace_dir\":\"~/spack/opt/spack/linux-ubuntu24.04-zen2/gcc-13.3.0/palace-develop-36rxmgzatchgymg5tcbfz3qrmkf4jnmj/bin/palace\",#\"PATH/TO/PALACE/BINARY\",\n", " #e.g.: \"palace_dir\":\"/home/prasanna/spack/opt/spack/linux-ubuntu24.04-zen2/gcc-13.2.0/palace-0.12.0-q65qvkwsa5zglixv3rmm424wqsu3mcpv/bin/palace\"\n", " }\n", "\n", "#Create the Palace capacitance simulation\n", "cap_sim = PALACE_Capacitance_Simulation(name = 'xmon_cap_sim', #name of simulation\n", " metal_design = design, #feed in qiskit metal design\n", " sim_parent_directory = \"\", #choose directory where mesh file, config file and HPC batch file will be saved\n", " mode = 'simPC', #choose simulation mode 'HPC' or 'simPC' \n", " meshing = 'GMSH', #choose meshing 'GMSH' or 'COMSOL'\n", " user_options = user_defined_options, #provide options chosen above\n", " create_files = True) #create mesh, config and HPC batch files\n", "\n", "#Add metallic elements from layer 1 in design file\n", "cap_sim.add_metallic(1)\n", "\n", "#Add ground plane to simulations\n", "cap_sim.add_ground_plane()\n", "\n", "#Fine mesh the transmon cross qubit region\n", "cap_sim.fine_mesh_components(['Q1'], min_size=12e-6, max_size=100e-6, taper_dist_min=10e-6, metals_only=False)\n", "\n", "#Fine mesh resonator, launch pads and transmission line\n", "cap_sim.fine_mesh_components(['resonator1', 'TL', 'LP1', 'LP2'], min_size=12e-6, max_size=120e-6, taper_dist_min=10e-6)\n", "\n", "#This will prepare the mesh file and the config file\n", "cap_sim.prepare_simulation()" ] }, { "cell_type": "code", "execution_count": 8, "metadata": {}, "outputs": [], "source": [ "#view the mesh\n", "cap_sim.open_mesh_gmsh()" ] }, { "cell_type": "code", "execution_count": null, "metadata": {}, "outputs": [], "source": [ "#Display the indices of the conductors to match with capacitance matrix - it will be automatically generated with the output anyway\n", "cap_sim.display_conductor_indices()" ] }, { "cell_type": "code", "execution_count": null, "metadata": {}, "outputs": [], "source": [ "#run the simulation\n", "capMat = cap_sim.run()" ] } ], "metadata": { "kernelspec": { "display_name": "testing_sqdmetal", "language": "python", "name": "python3" }, "language_info": { "codemirror_mode": { "name": "ipython", "version": 3 }, "file_extension": ".py", "mimetype": "text/x-python", "name": "python", "nbconvert_exporter": "python", "pygments_lexer": "ipython3", "version": "3.11.10" } }, "nbformat": 4, "nbformat_minor": 2 }